The invention relates to a device and method for low resistance contact to semiconductors. More specifically, the invention relates to low resistance contacts for shallow junction indium phosphide (InP) semiconductor devices.
There are numerous metal-InP contact systems where specific contact resistivities in the 10.sup.-6 .OMEGA.-cm.sup.2 range have been achieved. However, the achievement of low resistance electrical contact to InP has inevitably been accompanied by degradation of the InP itself. In order to obtain low resistivities the contacts have been either heat treated (sintered) after their deposition on the InP, or the InP lattice purposely damaged prior to metal deposition by energetic ion bombardment or the like in order to obtain low resistivity. Heat treatment after contact deposition causes the dissolution of substantial amounts of InP into the contacting metallization. Unless careful control of the heat treatment is maintained the dissolution will destroy the InP device being contacted. Even with careful control, there is a trade-off between achieving low contact resistance and inflicting mechanical and electrical damage on the InP device. The generation of lattice damage in the InP prior to metal deposition, typically by ion etching or sputter deposition of the contact metallization, also degrades the electrical characteristics of the InP device by generating a region of very low minority carrier lifetime and high recombination velocity in the device. While these effects can be tolerated in some very deep junction devices, they are extremely harmful in shallow junction devices such as solar cells and junction gated field effect transistors (JFETs). Some ultra-low specific contact resistivities in the 10.sup.-7 .OMEGA.-cm.sup.2 range have also been reported for several metal-InP couples, but these extremely low values have never been achieved without post-deposition heat treatment or pre-deposition lattice damage.
Another problem that has plagued InP semiconductors is their poor stability at high temperatures. Intentional or unintentional exposure of InP devices to elevated temperatures, e.g., greater than about 350.degree. C., for extended periods of time, e.g., greater than about 10 minutes, will result in the destruction of all but the deepest junction devices. In attempts to provide contacts that could be used at elevated temperatures refractory metals have been used to augment the contact metallization. While refractory metals do not react destructively with InP at high temperatures, e.g., 400.degree. C., they also do not form low resistance contacts. Thus, they are always used in conjunction with other metals that do form low resistance contact to InP. These metals still require process steps that result in degradation of the semiconductor device.
Recent work by the inventors has shown that during sintering, or other heat treatment, gold-InP systems progress through at least three phase changes. During these three stages, all of which are solid state in nature, both indium (In) and phosphorus (P) leave the semiconductor and enter the metallization. In the first stage, which continues until the In content in the Au lattice of the contact metallization reaches the solid solubility limit, In atoms enter the metallization interstitially and diffuse until encountering vacant sites in the Au lattice, at which point they take substitutional positions on the Au lattice by annihilating the vacancies. In the second stage, the saturated Au(In) solid solution is converted to Au.sub.3 In. During this stage In atoms again enter the metallization interstitially, but here they diffuse to the Au(In)/Au.sub.3 In interface where they displace substitutional Au atoms into interstitial positions. The interstitial Au atoms thus formed then diffuse to and react with newly released P atoms from the InP to form Au.sub.2 P.sub.3 at the metal-semiconductor interface. The rate of entry of In into the metallization is the rate limiting step in this second stage. In the third stage, the Au.sub.3 In is converted to Au.sub.9 In.sub.4, also by displacing substitutional Au atoms into interstitial positions, but the rate limiting step here is believed to be this displacement or exchange step itself. A thorough discussion of the metallurgical and electrical interactions and mechanisms occurring in InP semiconductor systems is found in V. G. Weizer and N. S. Fatemi, J. Appl. Phys. 69(12), 8253 (1991), and N. S. Fatemi and V. G. Weizer, J. Elect. Mat., 20(10) 875 (1991), both of which are incorporated herein by reference.